Upcoming Webinars
No webinars are currently scheduled - check back later or view one of our archived
webinars below
Archived Webinars
The complexity of modern System-on-Chip (SoC) designs is exposing the limitations
of a previous generation of system level architecture design methodologies. Poor
performance, short battery life and random deadlocks are just a few of the problems
which can be seen when SoC architects are forced to rely on spreadsheets and back
of the envelope calculations. Virtual platforms with 100% cycle accurate models
enable SoC architects to quickly and easily make design decisions and then, more
importantly, analyze the impacts of these decisions on system performance and functionality.
What you will learn:
- How to identify and eliminate on-chip system level bottlenecks
- Methods for quickly optimizing memory sub-systems
- System level methods
for analyzing & optimizing AMBA interconnect
This webinar will conclude with a demonstration of the process of modeling a complex
system and the analyzing the impact of design decisions on system behavior and performance.
Dramatically increasing software content is posing greater and greater challenges
for traditional hardware-oriented design and verification methodologies. The increasing
number of software work-arounds required to overcome hardware bugs is highlighting
the need to begin system integration testing much earlier in the design process,
and to use more accurate models of the system. In addition, the need to start software
debug sooner in order to bring in project schedules as well as the need to perform
software optimization is driving the demand for virtual platforms to enable pre-silicon
software validation and analysis. This webinar will demonstrate the process of modeling
a complex system and providing the accuracy and performance required to validate
software, debug the integrated system, and perform the performance analysis required
to tune the software.
The complexity of modern System-on-Chip (SoC) designs is exposing the weaknesses
of traditional system architecture design methodologies. Poor performance,
short battery life and random deadlocks are just a few of the problems which can
be seen when SoC architects are forced to rely on spreadsheets and back of the envelope
calculations. Virtual platforms enable system architects to quickly and easily
make design decisions and then, more importantly, analyze the impacts of these decisions
on system performance and functionality. This webinar will demonstrate the
process of modeling a complex system and the analyzing the impact of design decisions
on system behavior and performance.
Learn how you can concurrently debug the hardware and software in your ARM based
device by plugging accurate models of your hardware directly into the ARM RealView
SoC Designer environment.
Learn how you can concurrently debug the hardware and software in your MIPS based
device by plugging accurate models of your hardware directly into the MIPSsim environment.
Learn how to automatically generate accurate models for CoWare Platform Architect
directly from the HDL description.
Join Carbon Design Systems and learn about accelerating system validation efforts
with the use of Carbon's Replay technology.