Technology Engineer

Carbon's technology generates a virtual hardware model, which is a linkable software object, from Verilog and VHDL.  The technology group develops Carbon’s proprietary compilers and algorithms that are used to create linkable C/C++ models at various levels of abstraction.  These models are used in standard SystemC and various C/C++ virtual platforms to enable HW/SW design and verification. 

Candidates with experience in two or more of the following areas will be considered:

• Experience in the parsing, analysis, optimization and simulation of hardware designs written in HDLs such as Verilog, SystemVerilog or VHDL.
• Experience with working with the api for FlexLM (license manager).
• Experience in the area of code analysis and optimization (local and global) for runtime performance, either for HDL simulators or for computer language compilers (gcc, C++).
• Experience with the creation of HDL simulator data using either waveform representations such as fsdb or vcd.
• Experience with the development and documentation of a customer visible API for the access of design information.  In particular experience with maintaining both forward and backward compatibility of data representations.
• Experience with data compression and encryption.
• Experience with the code generation phase of C++ compilers, such as gcc, and how the compiler defines the layout of data and objects.
• Demonstrated ability to design and integrate new features into an existing C++ code base.

The work is done in C++ and Python on Linux and Windows.  Candidate must be able to own a project through specification, design, build and test.

Candidate must have a strong desire to learn.

Please submit your resume through one of the following methods: 

Email:
jobs@carbondesignsystems.com
Please attach a resume and salary requirements as MS Word or pdf formats.

Fax:
781.890.1711
Please fax a resume and salary requirement attention: Human Resources.