Tips, Ideas, Discussion for SOC Virtual Prototypes

Performance Analysis of Cortex-A15 and AMBA 4

 Email Article  

Tweet  

  

Just what are architects going to do with the ARM® Cortex™-A15 and all of the new related pieces of ARM IP? How are the architects going to optimize their systems to meet performance, power, and area goals using the new IP?

Those were the questions that drove me to present a paper on Cortex-A15 and AMBA® 4 performance analysis at ARM TechCon 2011. At that point, the AMBA 4 specifications were published, the Cortex-A15 and related IP were starting to roll out, and there was a steady stream of Cortex-A15 partner announcements coming from ARM. We at Carbon had been busy rolling out the cycle-accurate Cortex-A15 model on Carbon IP Exchange along with AMBA 4 modeling extensions to our SoC Designer Plus product.

While creating the paper, I found that I stopped thinking of the Cortex-A15 as a single piece of IP, but instead as a family of IP, protocols, and system configurations:

IP

• Cortex-A15 and Cortex-A7 cpus
• CCI-400 and NIC-400 interconnects
• GIC-400, MMU-400, and DMC-400 components

AMBA 4 Protocols

• AXI4 extends AXI3
• ACE extends AXI4 by adding coherency support
• AXI4-Lite, AXI4-Stream are new protocols
• APB4 extends APB3

System Configurations

• big.LITTLE – Cortex-A15 and Cortex-A7 in same system with dynamic workload distribution
• Cortex-A15 or Cortex-A7 with varying degrees of system-level coherency
• AXI3-type system with no coherency outside the multi-core
• ACE configurations which utilize the CCI-400 to manage coherency

Given the wide variety of options, the system architects will need to prototype candidate systems in order to answer their IP selection and configuration questions. Other methods such as back-of-envelope calculations, Excel spreadsheets, or even estimation using legacy Cortex-A9 systems, simply won’t cut it.

Prototyping must be done using models which are both behaviorally and temporally accurate. Without these accuracies, gross measurement errors will occur due to compounding smaller errors throughout the system. Which is what Carbon’s tools provide; since Carbon Model Studio automatically creates models from RTL, they are behaviorally and temporally accurate by construction.

To learn more about how to optimize your Cortex-A15 design using AMBA 4, download Joe's paper using the linked button below.