Simplifying Virtual Prototype Adoption
I hate being early to a party. You stand around in a mostly empty room awkwardly talking to the few other people who also didn’t quite time things well enough to show up at that perfect moment. Meanwhile, everyone in attendance is quietly wondering if the party will even turn out to be worth going to after all. The only thing that’s worse than missing a party is showing up to an event that no one else bothers to attend.
For a long time, virtual prototyping was in that nascent stage waiting to gain critical mass and go from being an interesting side project to a necessary part of the system on chip (SoC) design process. Well, if the press and EDA press releases are to be believed the virtual prototype party is the “in” place to be. I no longer have to go to a company and convince them that virtual prototyping is something they should be doing. Now it’s much more a matter of discussing the proper way to do it.
It's Not Always Fun and Games
Even in this era of standardization however there is more work involved in the typical virtual prototype than pulling a few components off the shelf, tying them together and being productive. Assembling a typical system can require detailed component knowledge to configure or code the individual SoC blocks. In addition, some level of programming proficiency is needed to get the various elements configured and running correctly. Finally, a good knowledge of the overall system architecture is good to have to make sure that all of the pieces can actually speak with each other. In short, assembling even a simple virtual prototype can often be a rather daunting challenge requiring numerous areas of expertise.
Carbon Design Systems showed up a bit early to the virtual prototyping party. Ten years ago when I went into an account and talked with the engineering teams it was often the first time that the software and hardware engineers had met each other (something that still shocks me) We needed to convince the teams that it really was a good idea to work together, change how they were doing design and start doing things in parallel. There were certainly times when we wondered if enough people were going to show up to the party to make it the place where everyone wanted to be. Now that virtual prototyping is THE place to be, our time spent in that awkward phase is paying off. Our CPAK announcement last week is proof of that. CPAKs are Carbon Performance Analysis Kits that accelerate the analysis, optimization and verification of system-on-chip (SoC) performance.
Our Awkward Period, Your Gain
In our ten plus years in the virtual prototyping space we’ve introduced 100s of design teams to the technology and gotten them up and running and productive. We’ve taught architects how to understand RTL so they could create something which met their needs. We’ve taught RTL engineers how to initialize ARM® Cortex™-A9 page tables in firmware so they could get a basic system up and running. All of this teaching however taught us something as well: a good example is the best starting point for engineering design. So, two years ago we embarked on an effort to further the automation of virtual prototyping.
We were already pioneers in the virtual prototyping space by having the industry’s only model compiler to transform RTL into a virtual model. Compiling RTL still requires having a level of hardware knowledge however so we automated that process for most leading wireless IP with our Carbon IP Exchange web portal. Now, designers can create hundreds of 100% accurate models around the clock by answering a few simple questions. System and programming knowledge is still required however to pull the components together and initialize them.
Breaking Down the Barriers
With Carbon Peformance Analysis Kits (CPAK) we have broken down another major barrier to virtual prototype adoption. Now, instead of forcing designers to assemble a system themselves and then write all the software to pull things together, we have a wide variety of pre-built, pre-configured systems running software at various levels of abstraction. These configurations vary from bare-metal systems running low-level benchmarks to complete systems with Android and Linux already running. Instead of taking weeks or month to achieve productivity, you can now start being productive within minutes or hours of initial download. We provide all of the source code as well of course so you can further customize the system to meet your actual needs. We’ve already deployed CPAKs to key customers. In fact, you can read about the experience that one of our customers had with CPAKs on last week’s guest blog on ARM’s website.
CPAKs are available now for most processors on IP exchange in bare metal form. These include the ARM Cortex-A15, Cortex-A9 and Cortex-A7. We’ll have Linux and Android versions up soon which take advantage of our Swap & Play™ technology so you can boot the OS in seconds using ARM Fast Models and then switch over to the 100% accurate representation at any software breakpoint. This isn’t the end of the story either. We will be announcing a number of new CPAKs shortly which take advantage of our industry-leading IP partnerships. Combining leading IP from various vendors together with the relevant software in a single, pre-built virtual prototype will enable even further schedule acceleration.
I’m not naïve enough to believe that CPAKs solve all of the design bottlenecks associated with virtual prototyping. We spent too long during the awkward stage of the party talking to the other early arrivers to think that we’re going to solve all of the problems with a single product rollout. That experience combined with our unmatched IP partnerships, model compilation technology and customer successes tell me that we’re certainly headed down the right path however. This is one party that I think we’re all going to enjoy.